A regulator with a low voltage drop or low dropout voltage (difference between the voltage delivered at the output and the input voltage) allows a stable output voltage to be obtained regardless of the value of the output current demand.
The most widely used LDO regulator architecture comprises an error amplifier having a differential pair of input transistors, for example PMOS transistors, associated with a circuit having a folded cascode structure. However, such a structure suffers from a closed-loop instability. Accordingly, in order to improve the stability of the regulator, a capacitor, referred to as a Miller compensation capacitor, is generally placed between the output stage of the regulator and the cascode node situated on the output side of the error amplifier. This Miller compensation capacitor, configured in negative feedback mode, allows the dominant pole to be moved towards low frequencies, while at the same time shifting the output pole towards high frequencies. However, the combination of the Miller compensation capacitor and the impedance of the said cascode node leads to a third pole of this cascode node being obtained situated on the output side.
And, when the output current of the regulator increases, the output pole moves towards high frequencies, and at high currents, this output pole and the aforementioned third pole are then situated at neighboring frequencies, thus creating a complex conjugated pole which degrades the stability of the system.